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Eduardo Boemo Scalvinoni

Universidad Autónoma de Madrid

 

Digital System Lab / Euroform: R&D Projects

Site Map

 

 

Academic Courses:

 

CED (Logic Design)

Lab CED (Logic Design)

DIE (ASIC)

Advanced Reconfigurable Systems (Master)

 

 

Publications:

 

Papers

Books

Ph.D. Thesis Advising

 

 

R&D / Industry:

 

Digital System Lab

Digital System Lab Project List

 

EUROFORM Technical Training for Industry

EUROFORM past  activities

 

 

Android:

 

Android App

Apple App

Seminars on Android

 

 

Technical Conferences:

 

FPL 2006

SPL 2007

SPL 2006

JCRA 2007

JCRA 2003

 

 

Journals:

 

JOLPE (Low-Power)

ACM TRETS (FPGAs)

 

 

Joining DSLab:

 

PFC, TFG at DSLab UAM?

 

Sabbatical year, Master or PhD Degree at the UAM?

 

How to reach the Lab

 

      Projects at the EPS - UAM (since 1996)
 

 

Project Title: ”Development of Photonic and Radiofrequency Instrumentation. Application to Space Geodesy (DIFRAGEOS)”.

Project Director: Magdalena Salazar Palma (Univ. Carlos III de Madrid).

Contractor/Sponsors: Comunidad Autónoma de Madrid.

Period: 2014-2017.

Partners: Univ. Carlos III de Madrid, Univ. Politécnica de Madrid, Univ. Autónoma de Madrid, Inst. Geográfico Nacional, Observatorio Astronómico Nacional, Inst. Nacional de Técnica Aeroespacial Esteban Terradas.

Technology: Xilinx FPGAs.

 

Project Title: “2015 Xilinx-ISE-VHDL Intensive Training Course”

Project Director: Eduardo Boemo

Contractor/Sponsors: Spanish Avionics, Space, Control, and Telecom Companies.

Period: 2015

Technology: FPGA

Webpage: http://arantxa.ii.uam.es/~euroform/

 

Project Title: “Servicios de entrenamiento, capacitación y logística internacional. Actividades de capacitación en MNT de la Unión Europea”

Project Director: Eduardo Boemo

Contractor/Sponsors: INTI, EURO INVEST S.A (Argentine).

Period: 2015

Technology: FPGA

 

Project Title:  "App Android and iOS for physical exercise and biometric monitoring of blind persons”

Project Director: Eduardo Boemo

Contractor/Sponsors: Fundación Vodafone España

Period: 2014

Technology: Android and iOS.

 

Project Title:  "Savia

Project Director: Eduardo Boemo

Contractor/Sponsors: Avanza Program, Ministry of Industry, Spain

Partners: Quantion, Madrid

Period: 2011-2013

Technology: Android and iOS.

 

Project Title:  "Smartphone-based GPS-Compass System for Blind Person Guidance”

Project Director: Eduardo Boemo

Contractor/Sponsors: Fundación Vodafone España

Period: 2012-2013

Technology: Android and iOS.

Additional Notes: FUAM Newsletter

 

Project Title: “Autonomous Sonar for Blind Person Connectable to an Smartphone”

Project Director: Eduardo Boemo

Contractor/Sponsors: Santander Bank – UAM Program of Project with Latin America

Partners: University Federal of Rio Grande do Norte (Brasil), Universidad Nacional del Sur (Bahía Blanca, Argentina), Universidad Nacional del Centro (Tandil, Argentina)

Period: 2011-2012

Technology: Embedded Processors, FPGA.

 

Project Title: “2012 Xilinx-ISE-VHDL Intensive Training Course”

Project Director: Eduardo Boemo

Contractor/Sponsors: Spanish Avionics, Space, Control, and Telecom Companies.

Period: 2012

Technology: FPGA

Webpage: http://arantxa.ii.uam.es/~euroform/

 

Project Title: “2011 Xilinx-ISE-VHDL Intensive Training Course”

Project Director: Eduardo Boemo

Contractor/Sponsors: Spanish Avionics, Space, Control, and Telecom Companies.

Period: 2011

Technology: FPGA

Webpage: http://arantxa.ii.uam.es/~euroform/

 

Project Title:  "Efficient Protection of IP Blocks”

Project Director: Eduardo Boemo

Contractor/Sponsors: TEC Program, Ministry of Science, Spain

Partners: Universidad de Granada, Spain

Period: Sep 2007 – Sep 2011

Technology: Xilinx FPGAs.

 

Project Title: “2010 Xilinx-ISE-VHDL Intensive Training Course”

Project Director: Eduardo Boemo

Contractor/Sponsors: Spanish Avionics, Space, Control, and Telecom Companies.

Period: 2010

Technology: FPGA

Webpage: http://arantxa.ii.uam.es/~euroform/

 

Project Title: “2009 Xilinx-ISE-VHDL Intensive Training Course”

Project Director: Eduardo Boemo

Contractor/Sponsors: Spanish Avionics, Space, Control, and Telecom Companies.

Period: 2009

Technology: FPGA

Webpage: http://arantxa.ii.uam.es/~euroform/

 

Project Title: “2008 Xilinx-ISE-VHDL Intensive Training Course”

Project Director: Eduardo Boemo

Contractor/Sponsors: Spanish Avionics, Space, Control, and Telecom Companies.

Period: 2008

Technology: FPGA

Webpage: http://arantxa.ii.uam.es/~euroform/

 

Project Title:  " Prototype of a Portable Tripanosoma Cruzi (PDP-TC) Detector"

Project Director: G. Sutter

Contractor/Sponsors: Banco Santander Central Hispano.

Period: Jan 2007 - Dec 2007

 

Project Title:  "Surlabs: Latin American Regional Laboraroties on FPGA Technology"

Project Director: Eduardo Boemo

Contractor/Sponsors: Banco Santander Central Hispano, Xilinx Inc., Altera Corp., Hewlett-Packard, CAECE University, Agencia Nacional de Promoción Científica y Técnica, Argentina.

Period: March 2005 - 2007

Web page of the project: http://www.ii.uam.es/~mcts/SURLABS.htm and http://www.splconf.org/

 

Project Title: “2007 Xilinx-ISE-VHDL Intensive Training Course”

Project Director: Eduardo Boemo

Contractor/Sponsors: Spanish Avionics, Space, Control, and Telecom Companies.

Period: 2007

Technology: FPGA

Webpage: http://arantxa.ii.uam.es/~euroform/

 

Project Title: FPL 2006 Conference

General Chairperson: Eduardo Boemo

Contractor/Sponsors: Xilinx, Celoxica, Altera, Cesnet, Synplicity, Agilent, Mentor Graphics, Alpha Data, Xjtag.

Partners:  Universidad Autónoma de Madrid, Technical University of Darmstadt, The Chinese University of Hong Kong

Period: Jan 2006 – Dec 2006

Webpage of the project: http://arantxa.ii.uam.es/~fpl06/

 

Project Title: “2006 Xilinx-ISE-VHDL Intensive Training Course”

Project Director: Eduardo Boemo

Contractor/Sponsors: Spanish Avionics, Space, Control, and Telecom Companies.

Period: 2006

Technology: FPGA

Webpage: http://arantxa.ii.uam.es/~euroform/

 

Project Title: “MicroBlaze-MicroLinux Embedded System for Industrial Tile Printer”.

Project Director: Eduardo Boemo

Contractor: Kerajet, Spain

Period: 2005-2006

Technology: Xilinx FPGAs.

 

Project Title: “2004-2005 Xilinx-ISE-VHDL Intensive Training Course”

Project Director: Eduardo Boemo

Contractor/Sponsors: Spanish Avionics, Space, Control, and Telecom Companies.

Period: 2004-205

Technology: FPGA

Webpage: http://arantxa.ii.uam.es/~euroform/

 

Project Title:  "Campus Europae. Engineering Commitee"

Chairman Engineering Committee: Eduardo Boemo

Contractor/Sponsors: European University Foundation and Ministry of Culture, Higher Education and Research (Luxembourg).  Allianz Kulturstiftung, Volkswagen Stiftung, Herbert-Quandt-Stiftung (Germany).

Period: March 2002 - 2004

Web page of the project: http://www.campuseuropae.org/en/  and http://arantxa.ii.uam.es/~europae/

 

Project Title: "Sistems of Reconfigurable Computing on FPGAs (SCORE): Analysis of Themal Aspects"

Project Director: Eduardo Boemo

Contractor: Conserjería de Educación, Comunidad Autónoma de Madrid, Project 07T/0052/2003 3

Period: 2003 - 2004

Technology: Xilinx FPGAs.

 

Project Title: "GEMYC: Management of Emergencies and Communications"

Project Director: Eduardo Boemo

Contractor: Fedetec (Madrid, Spain).

Partners: Iaerobotics (Madrid, Spain).

Period: 2002-2003.

Project Summary: Small capability PCI System for emergency centers. Currently working at the Spanish "112" emergency call.  Voice-Data PBX with Basic ISDN access capability. H100 Standard compatible.

Technology: Agere chipset, Xilinx FPGAs and PLDs.

 

Project Title:"Design of IP-Cores for Wireless Commnucations based on OFDM. Low Power Optimization of the mobile units"

Project Director: Eduardo Boemo

Contractor: Programa Nacional de Comunicaciones (CICYT and DGT, Spain). TIC2001-2688-C03-03

Period: 2001-2003

Technology: Xilinx FPGAs.

 

Project Title: Integrated B2B E-Commerce Systems

Project Director: Eduardo Boemo

Contractor: Cecofersa (Alcobendas, Spain).

Partners: Inetsys (Madrid, Spain).

Period: 2000-2001.

Project Summary: Internet portal for B2B in the area of construction hardware. It concentrates the activities of more than one hundred SMEs.

Technology: Linux.

Web page of the project: http://www.cecoshop.com/

 

Project Title: "Multiplier Effect Project : EUROFORM - European Training Institute"

Contractor: Leonardo Program, European Union. Contract: F/99/1/062137/PI/III.3.a/FPC.

Period: 1998-2000.

Project Summary: Technical training and assistance for SMEs in the area of electronic system design.

Web page of the project: http://www.ii.uam.es/~euroform/  and http://www.mee.tcd.ie/research_groups/ic_design_fab/euroform/

.

Project Title: "Student Placement: EUROFORM - European Training Institute"

Project Director: Eduardo Boemo

Contractor: Leonardo Program, European Union. Contract: F/99/07144/PL/II.1.2.a/FPI

Period: 1999-2000.

Project Summary: Placement of graduated students in european SMEs.

Web page of the project: http://www.ii.uam.es/~euroform/  and http://www.mee.tcd.ie/research_groups/ic_design_fab/euroform/


Project Title: Digital Communication Integrator Board: Modification of DMA

Project Director: S. López-Buedo

Contractor: FEDETEC (Madrid, Spain).

Period: 2000.

Project Summary: Hardware modification to increase DMA bandwidth of a ISA Voice-Data PBX with Basic ISDN access capability. MVIP Standard compatible.

Technology: Mitel chipset, Xilinx FPGAs and PLDs.

 

Project Title: PCI Architecture for a Digital Communication Integrator Board

Project Director: Eduardo Boemo

Contractor: Fedetec (Madrid, Spain).

Partners: Microbótica (Madrid, Spain).

Period: 1999-2001.

Project Summary: PCI Voice-Data PBX with Basic ISDN access capability. H100 Standard compatible.

Technology: Agere chipset, Xilinx FPGAs and PLDs, DSP Texas.

 

 

 

 

   Projects at the ETSI Telecomunicación - UPM (1989-1996) inside the Grupo de Arquitectura Digitales


 

Project Title: "COMA: A Methodology for Synthesis, Design, and Evaluation of VLSI Architectures for Video Image Coding".

Project Director: Juan Meneses

Contractor: Programa Nacional de Comunicaciones (CICYT and DGT, Spain). Project TIC-95-0791.

Period: 1995-1998.

Technology: Xilinx and Altera FPGAs, ES2 Standard Cells.

 

Project Title: "A Methodology for the Desing and Synthesis of DSP VLSI Arcuitectures"

Project Director: Juan Meneses

Contractor: Programa Nacional de Comunicaciones (CICYT and DGT, Spain). Project TIC-92-0083.

Period:1992-1995.

Technology: Xilinx and Altera FPGAs, ES2 Standard Cells.

 

Project Title: "Digital Communication Integrator Board"

Project Director: Juan Meneses

Contractor: Fedetec, (Madrid, Spain).

Period: 1996.

Project Summary: Design and construction of a PC-based Voice-Data PBX with Basic ISDN access capability. MVIP Standard compatible.

Technology: Mitel chipset, Xilinx FPGAs, Microprocessor Motorola MC68302.

 

Project Title: "TALGO: Design of an ASIC for the control of Audio Channels".

Project Director: Juan Meneses

Contractor: SIDSA, Spain.

Period: 1993-94.

Project Summary: Design of a mixed-signal integrated circuit for audio TDM demultiplexing (four analog channels), and volume control. The chip is currently utilized on spanish Talgo trains. More than 30K units have been fabricated.

Technology: 1.5 m ES2 Standard Cells, SOLO 1400.

 

Project Title: "Massive Solid-State Memory for On-Board Satellite Applications".

Project Director: Juan Meneses

Contractor: Alcatel Space.

Period: 1993.

Project Summary: Design of a low-power, graceful-degradation , 2-Gbytes , 150-Mbits/seg memory bank.

Technology: Hard-Rad standard components.

 

Project Title: VITA ("Video Telephone Alcatel").

Project Director: Juan Meneses

Contractor: ALCATEL-SESA, Spain.

Period: 1990-91.

Project Summary: Design and construction of a two boards for Raster Scan to CIF CCIR 605 conversion and vice versa.

Technology: Standard off-the-shelf components, PLDs, Xilinx FPGAs.

Project Title: "CAD Tools for the Design of Systolic Arrays".

Contractor: IBM Spain.

Period: 1990-91.

Project Summary: EDA tools for Synthesis and Simulation of Systolic Architectures.

 

Project Title: HIVIT ("High Quality Video Telephony").

Project Director: Juan Meneses

Contractor: Telefónica I+D, Spain.

Period: 1989-90.

Project Summary: Design and construction of a board for Variable Length Video Decoding.

Technology: Standard off-the-shelf components, PLDs.