FPGA at UAM

Eduardo Boemo Scalvinoni

Universidad Autónoma de Madrid

Profesor Titular de Arquitectura y Tecnología de Computadores

e2017 Eduardo I. Boemo received the Electrical Engineering degree from the Universidad Nacional de Mar del Plata (UNMdP), and the Ph.D. degree from the Universidad Politécnica de Madrid (ETSIT UPM). He is Titular Professor on Digital Design (CED) and Application-Specific Integrated Circuits (DIE/DEySE) at the School of Engineering (EPS) of the Universidad Autónoma de Madrid. He also is Honorary Advisor at CAECE University Mar del Plata, and Director of Euroform Spanish Pole, an organization that has provided technical training on FPGAs to more than 800 engineers in Spain and Latin-America. From 1989 to 1996, he was Associated Professor at the ETSIT UPM.

He served as General Chair of six conferences on FPGA: IEEE FPL 2006, IEEE SPL (2008, 2007, and 2006), and JCRA (2007 and 2003). He was Guest Co-editor of the IET Computers & Digital Techniques Special Issue on FPGAs (July, 2007) and member of the Editorial Board of the ACM Transactions on Reconfigurable Technology and Systems (2013-2018), and the Journal of Low-Power Electronics (2005- ).

Projects, Papers, Ph.D.Thesis, Seminars and Courses are focused on FPGA Design Methodologies; in particular: Area–Time-Power-Thermal Optimization, Synchronization, and E.E. Education.